Interview

SiFive raises $400M Series G to build RISC-V CPUs for AI data centers, with Nvidia participating

Apr 13, 2026 with Krste Asanović

Key Points

  • SiFive closes $400M Series G led by Atreides Management with Nvidia as co-investor to develop high-performance RISC-V CPUs for AI data centers.
  • Power constraints, not GPU scarcity, are forcing hyperscalers toward custom silicon; SiFive's customizable CPU designs let customers integrate cores without building design capability in-house.
  • Nvidia's participation signals GPU makers see CPU performance as a complementary bottleneck in AI inference at scale, positioning SiFive's licensing model as strategic infrastructure.
SiFive raises $400M Series G to build RISC-V CPUs for AI data centers, with Nvidia participating

SiFive raises $400M to build RISC-V CPUs for AI data centers

SiFive, the semiconductor IP company founded in 2015 by UC Berkeley researchers including Krste Asanović, has closed a $400M Series G led by Atreides Management, with Nvidia participating. The round funds development of high-performance RISC-V CPUs designed to sit alongside GPUs in AI data centers.

The company's pitch is that AI inference at scale is increasingly bottlenecked by CPU performance, not GPU capacity. If an AI coding agent runs 30 times faster than a human, Asanović notes, you need to compile software 30 times faster too — and that load falls on general-purpose compute. SiFive's bet is that demand for high-performance, customizable CPU IP will grow alongside GPU deployments.

We raised 400,000,000. Lead was Atreides was the lead. We had some other notable names, including NVIDIA participated in the funding... AI, the last few years has been focused on building those models. Now they're being applied at massive scale. If you have an AI coder going 30 times faster than a human, you need to compile stuff 30 times faster — that can be the bottleneck, not the GPU side.

SiFive doesn't fabricate chips. It licenses CPU designs — the Rolls-Royce engine model, as Asanović describes it — so customers can integrate high-performance cores into their own silicon without building that design capability in-house. Customizability is central to the product: SiFive configures its cores to individual customer workloads rather than offering fixed catalog designs. Some investors in this round are also development partners, with collaboration beginning well before tape-out.

Power constraints are the primary driver pushing hyperscalers toward custom silicon. Data centers can't simply add grid capacity, so swapping older racks for chips that are 2–3x more power-efficient is the main lever for expanding throughput within a fixed power budget. That dynamic also shapes chip replacement cycles — not just the technical aging problem of finer-geometry wires degrading at higher utilization, but the business case for replacing working silicon sooner than depreciation schedules would suggest.

On process nodes, Asanović argues the push for leading-edge silicon (TSMC 2nm, 3nm) makes sense for large data centers given power constraints, while trailing nodes remain relevant for edge AI — intelligent sensors, robots, and applications requiring high-voltage interfaces or non-volatile memory unavailable at advanced nodes.

SiFive was founded in 2015 and has spent a decade building out the RISC-V ecosystem, moving from embedded and lower-end IP toward increasingly high-performance designs. The Series G marks a deliberate return to the top of that stack.

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